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VLSI SIGNAL PROCESSING ME01000401

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Code: ME01000401 Credits: 4 Semester 1 VD

VLSI Signal Processing

Get the full GTU study material, English & Gujarati textbook PDFs, syllabus curriculum, and solved previous year question papers.

VLSI Signal Processing Syllabus — Unit-wise Content

The official GTU curriculum for VLSI Signal Processing (subject code ME01000401) as prescribed for VD · Semester 1 divides the course into 5 units, covering 28 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.

Download the official syllabus PDF (ME01000401)

Unit 1 Introduction to DSP algorithms, Iteration bound

10 lecture hours

Typical DSP algorithms: Convolution
adaptive filters
Data-flow graph representations
iteration bound and its Computation
iteration bound of Multirate data-flow graphs

Unit 2 Pipelining, Parallel Processing and Retiming

9 lecture hours

Pipelining of FIR filters
Parallel processing
Pipelining and Parallel Processing for low power
definitions and properties of retiming
system inequalities and its solution
retiming techniques

Unit 3 Unfolding and Folding

9 lecture hours

Algorithm for unfolding
properties of unfolding
Comparative analysis of (i) Critical path (ii) unfolding and (iii) retiming
Folding transformation
Register minimization techniques
folding of Multirate systems
WEF Academic Year : 2024 - 25 Semester : 1st Semester Category of the Course : PEC Program Name: Master of Engineering Level: PG Branch: Electronics & Communication (VLSI System Design) Course / Subject Code : ME01000401 Course / Subject Name : VLSI Signal Processing

Unit 4 Systolic Architecture Design

7 lecture hours

Systolic array design methodology
FIR systolic arrays
Selection of scheduling vector
Matrix-matrix multiplication and 2D systolic array design
systolic design for space representations containing delays

Unit 5 Fast Convolution

10 lecture hours

Toom Algorithm
Winogard Algorithm
Iterated Convolution
Cyclic Convolution
Design of Fast Convolution Algorithm by Inspection

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VLSI Signal Processing

VLSI Signal Processing

VLSI Signal Processing Syllabus — Unit-wise Content

Unit 1 Introduction to DSP algorithms, Iteration bound

Unit 2 Pipelining, Parallel Processing and Retiming

Unit 3 Unfolding and Folding

Unit 4 Systolic Architecture Design

Unit 5 Fast Convolution

More Subjects in Semester 1

English for Research Paper Writing

Research Methodology and IPR

MOSFET Modeling for VLSI Circuits

Digital VLSI Design

Scripting Language for VLSI Design

Analog CMOS Circuit Design

VLSI Physical Design

VLSI Signal Processing

VLSI Design Verification

Research Methodology and IPR

Technical Report Writing

MOSFET Modelling for VLSI Circuits

Digital VLSI Design

Analog CMOS Circuit Design

VLSI Physical Design

VLSI Design Verification

Explore Other Semesters (VD)

VLSI Signal Processing

English Book & Chapters

English Book Coming Soon

GTU Previous Year Papers

Papers Coming Soon

VLSI Signal Processing Syllabus — Unit-wise Content

Unit 1 Introduction to DSP algorithms, Iteration bound

Unit 2 Pipelining, Parallel Processing and Retiming

Unit 3 Unfolding and Folding

Unit 4 Systolic Architecture Design

Unit 5 Fast Convolution

More Subjects in Semester 1

English for Research Paper Writing

Research Methodology and IPR

MOSFET Modeling for VLSI Circuits

Digital VLSI Design

Scripting Language for VLSI Design

Analog CMOS Circuit Design

VLSI Physical Design

VLSI Signal Processing

VLSI Design Verification

Research Methodology and IPR

Technical Report Writing

MOSFET Modelling for VLSI Circuits

Digital VLSI Design

Analog CMOS Circuit Design

VLSI Physical Design

VLSI Design Verification

Explore Other Semesters (VD)