Semiconductor Manufacturing and Packaging

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KHUDKIBOOK
SEMICONDUCTOR MANUFACTURING AND ME02096071
FREE PDF ME02096071
Code: ME02096071 Credits: 4 Semester 2 EACD

Semiconductor Manufacturing and Packaging

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Semiconductor Manufacturing and Packaging Syllabus — Unit-wise Content

The official GTU curriculum for Semiconductor Manufacturing and Packaging (subject code ME02096071) as prescribed for EACD · Semester 2 divides the course into 7 units, covering 33 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.

Download the official syllabus PDF (ME02096071)

Unit 1 Package form factors and families

4 lecture hours

  • package outline standardization
  • leaded package families
  • quad lead package families
  • substrate-based package families
  • chip scale packages
  • staked-die package family
  • package-on-package and related variations
  • flip-chip packages
  • wafer- level chip scale packages

Unit 2 Surface-Mount Technology

4 lecture hours

  • package cracking or ‘popcorning’
  • surface-mount packages
  • issues with advanced packaging
  • current and future trends

Unit 3 Materials used in semiconductor packaging

6 lecture hours

  • Polymers: molding compounds
  • die attach adhesives
  • underfill materials
  • organics substrates

Unit 4 Metals

  • lead frames
  • heat spreaders, and heat sinks
  • bonding wires
  • wafer bumping
  • technical issues. 6 15

Unit 5 Ceramics and Glasses

6 lecture hours

  • types of ceramics used in semiconductor packaging
  • types of glasses used in semiconductor packaging

Unit 6 Reliability Testing

8 lecture hours

  • examples of reliability tests: preconditioning conditions
  • temperature cycling and thermal shock
  • high-temperature storage life
  • temperature-humidity-bias tests
  • limitation of reliability testing

Unit 7 Trends and Challenges

8 lecture hours

  • copper interconnects and low-k dielectric materials
  • dielectric constant requirements at each technology node
  • future interconnect and dielectric materials
  • future packaging options

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