Logic Design using FPGA
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Follow on Instagram for UpdatesLogic Design using FPGA Syllabus — Unit-wise Content
The official GTU curriculum for Logic Design using FPGA (subject code ME01096061) as prescribed for EACD · Semester 1 divides the course into 8 units, covering 53 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.
Download the official syllabus PDF (ME01096061)Unit 1 Field-Programmable Gate Arrays
- FPGA building blocks: layout of Xilinx FGPA
- input/out blocks
- configurable logic blocks
- interconnect resources
- block RAM, DSP slices
- clock management
- the XADC block
- high-speed serial I/O transceivers
- peripheral component interconnect express interface
- FPGA-based digital system design philosophy
- usage areas of FPGAs Program Name: Master of Engineering Level: PG Branch: Electronics and Communication (VLSI Design) Subject Code: ME01096061 Subject Name: Logic Design using FPGA
Unit 2 The Vivado Design suite
- creating a new project
- synthesizing the project
- simulation the project
- implementing the synthesized project
- programming the FPGA
- Vivado design suit IP management
- application on the Vivado design suite
Unit 3 Introduction to Verilog and VHDL
- Verilog fundamentals
- testbench formation in Verilog
- VHDL fundamentals
- testbench formation in VHDL
- adding an existing IP to the project
Unit 4 Data Types and Operation
- Number representations
- negative numbers
- fixed- and floating-point representation
- ASCII code
- arithmetic operations on binary numbers
- data types in Verilog
- operation in Verilog
- data types in VHDL
- application on data types and operators
- FPGA building blocks used in data types and operators
Unit 5 Combinational Circuits
- combinational circuit analysis
- combinational circuit implementation
- combinational circuit design
- sample designs
- applications on combinational circuits
- FPGA building blocks used in combinational circuits
Unit 6 Combinational Circuit blocks
- parity generators and checkers
- applications on combinational circuit blocks
- FPGA building blocks used in combinational circuit blocks
Unit 7 Data Storage Elements
- read-only memory
- random access memory
- application on data storage elements
- FPGA building blocks used in data storage elements
Unit 8 Sequential Circuits
- sequential circuit analysis
- timing in sequential circuits
- shift register as a sequential circuit
- counter as a sequential circuit
- sequential circuit design
- application on sequential circuits
- FPGA building blocks used in sequential circuits. 6 15
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