Verification Methodology
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Follow on Instagram for UpdatesVerification Methodology Syllabus — Unit-wise Content
The official GTU curriculum for Verification Methodology (subject code 3735203) as prescribed for EAC( · Semester 3 divides the course into 5 units, covering 29 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.
Download the official syllabus PDF (3735203)Unit 1 Verification Using System Verilog
- What is the Functional Verification
- What is the Assertion based Verification
- Why use System Verilog for Verification
- OOP concept for System Verilog
- Layered approach for Verification
- Designing with OOP, OOP classes
- OOP connections
- Block level testing using OOP, Chip Level Testing
- Functional Coverage
- Assertion Based verification
- Interfacing with C
Unit 2 Universal Verification Methodology Understanding
- Verification Component Overview
- Transaction Level Modeling (TLM)
- Developing Reusable Verification Component
- Using Verification component
- Using Register Layer Class
Unit 3 Low Power Verification Techniques (CPF/UPF)
- Need of Power Aware Simulation
- Understanding Unified Power Format file
- Writing CPF/UPF
- Assertions checking for the low power Simulation
Unit 4 Verification of SOC with ARM/MIPS Processor
- ARM architecture as covered in Embedded classes
- Development of ARM/MIPS BFM
- Writing C test case on ARM, Using ARMCC and ARMSS compiler and linking it with simulator
Unit 5 Verification Environment build and Automation
- Use of Make file
- Perl & TCL script in running the test
- Running Regression of the test suit for the Device Under test
- Automatic regression results generation
- Merging of the code & functional coverage
- Ranking of the test suit
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