VLSI Signal Processing
Get the full GTU study material, English & Gujarati textbook PDFs, syllabus curriculum, and solved previous year question papers.
English Book & Chapters
English Book Coming Soon
We are working hard to add this material. Stay tuned for updates!
Follow on Instagram for UpdatesGTU Previous Year Papers
Papers Coming Soon
We are working hard to add this material. Stay tuned for updates!
Follow on Instagram for UpdatesVLSI Signal Processing Syllabus — Unit-wise Content
The official GTU curriculum for VLSI Signal Processing (subject code ME02026011) as prescribed for EAC( · Semester 2 divides the course into 5 units, covering 33 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.
Download the official syllabus PDF (ME02026011)Unit 1 Introduction to DSP algorithms, Iteration bound
- Typical DSP algorithms: Convolution
- adaptive filters etc
- Data-flow graph representations
- iteration bound and its computation
- iteration bound of Multirate data-flow graphs
Unit 2 Pipelining, Parallel Processing and Retiming
- Pipelining of FIR filters
- Parallel processing
- Pipelining and Parallel Processing for low power
- definitions and properties of retiming
- system inequalities and its solution
- retiming techniques
Unit 3 Unfolding and Folding
- Algorithm for unfolding
- properties of unfolding
- Comparative analysis of (i) critical path (ii) unfolding and (iii) retiming
- Folding transformation
- Register minimization techniques
- folding of Multirate systems
Unit 4 Systolic Architecture Design
- Systolic array design methodology
- FIR systolic arrays
- Selection of scheduling vector
- Matrix-matrix multiplication and 2D systolic array design
- systolic design for space representations containing delays
Unit 5 Bit-Level Arithmetic Architecture and Redundant Arithmetic
- Parallel multipliers
- Interleaved floor-plan and bit-plan based filters
- Bit-serial multipliers
- Bit-serial filter design and implementation
- Canonic signed digit arithmetic
- distributed arithmetic
- Redundant number representations
- Carry-free radix-2 addition and subtraction
- Hybrid radix-4 addition
- Hybrid redundant multiplication architectures
- Data format converter
Study on Android App:
