Unit 1 Introduction

• VLSI Design Process
• Layout Styles
• Difficulties in Physical Design
• Definitions and Notation. 6 12

Unit 2 Circuit Partitioning

6 lecture hours

• Problem Definition
• Cost Function and Constraints
• Approaches to Partitioning Problem
• Other Approaches and Recent Work

Unit 3 Floor planning

• Problem Definition
• Approaches to Floor planning
• Other Approaches and Recent Work. 6 12

Unit 4 Placement

6 lecture hours

• Problem Definition
• Cost Functions and Constraints
• Approaches to Placement
• Other Approaches and Recent Work

Unit 5 Grid Routing

6 lecture hours

• Problem Definition
• Cost Functions and Constraints
• Maze Routing Algorithms
• Line Search Algorithms
• Other Issues
• Other Approaches and Recent Work

Unit 6 Global Routing

6 lecture hours

• Cost Functions and Constraints
• Routing Regions
• Sequential Global Routing
• Integer Programming
• Global Routing by Simulated Annealing
• Hierarchical Global Routing
• Other Approaches and Recent Work

Unit 7 Channel Routing

5 lecture hours

• Problem Definition
• Cost Functions and Constraints
• Approaches to Channel Routing
• Other Approaches and Recent Work

Unit 8 Layout Generation

7 lecture hours

• Layout Generation
• Standard-cell Generation
• Optimization of Gate-matrix Layout
• Programmable Logic Arrays
• Other Approaches and Recent Work