Computer Architecture
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Computer Architecture Syllabus — Unit-wise Content
The official GTU curriculum for Computer Architecture (subject code 3154107) as prescribed for Robotics · Semester 5 divides the course into 5 units, covering 14 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.
Download the official syllabus PDF (3154107)Unit 1 Basic Structure of a Computer System
- - Functional Units – Basic Operational Concepts – Performance – Instructions: Language of the Computer – Operations
- Operands – Instruction representation – Logical operations – decision making – MIPS Addressing
Unit 2 Arithmetic For Computers
- - Addition and Subtraction
- Multiplication – Division – Floating Point Representation - Floating Point Operations – Subword Parallelism
Unit 3 Processor And Control Unit
- - A Basic MIPS implementation
- Building a Datapath
- Control Implementation Scheme – Pipelining
- Pipelined data path and control
- Handling Data Hazards & Control Hazards
Unit 4 Parallelism
- - Parallel processing challenges – Flynn’s classification – SISD
- SPMD, and Vector Architectures - Hardware multithreading – Multi-core processors and other Shared Memory Multiprocessors - Introduction to Graphics Processing Units
- Warehouse Scale Computers and other Message-Passing Multiprocessors
Unit 5 Memory & I/O Systems
- - Memory Hierarchy - memory technologies – cache memory – measuring and improving cache performance – virtual memory
- TLB’s – Accessing I/O Devices – Interrupts – Direct Memory Access – Bus structure – Bus operation – Arbitration – Interface circuits - USB 8 Subject Code: 3154107 w.e.f