Programmable Logic Devices & Applications
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Follow on Instagram for UpdatesProgrammable Logic Devices & Applications Syllabus — Unit-wise Content
The official GTU curriculum for Programmable Logic Devices & Applications (subject code 2162412) as prescribed for PE · Semester 6 divides the course into 8 units, covering 53 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.
Download the official syllabus PDF (2162412)Unit 1 Introduction
- Review of combinational logic design
- sequential logic design
- Overview of embedded systems
- design challenges
- processor technology
- IC technology
- design technology
- trade offs
Unit 2 General purpose Processors
- Basic architecture
- Programmer’s view
- Development environment
- Application Specific Instruction set Processors (ASIPs)
- Selecting a microprocessor
Unit 3 Single-Purpose Processors
- Combinational logic
- sequential logic
- custom single purpose processor design
- R-T level custom single purpose processor design
- Optimizing design
- General purpose processor design
- watch dog timers
- Pulse Width Modulators
- LCD controllers
- Keyboard controllers
- Stepper motor controllers
- Analog-to- Digital converters, RTC
Unit 4 Memory
- Memory write ability
- storage permanence
- memory types
- composing memory
- memory hierarchy
- EDO DRAM
- RDRAM etc.
- Memory management unit
Unit 5 Programmable Logic Devices
- PAL, PLA, FPGA
- CPLD etc.
- FPGA based system design
- FPGA architecture
- Programmable logic device manufacturers and their devices
Unit 6 Hardware Description Language
- Concept of hardware description languages like Verilog
- VHDL etc.
- logic design process
- modeling with HDL, Structural
- data flow and behavioral modelling
- Concept of network delay
- power and energy optimization etc
Unit 7 Implementation of Logic Circuits using HDL
- Implementation of combinational circuits
- sequential machine design
- Finite State Machine etc. using HDL
Unit 8 Simulation, modelling and implementation tools
- Xilinx ISE, Vivado
- Altera Quartus II etc.
- Use of the software for design
- design verification
- test bench etc
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