Computer Organization & Architecture

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COMPUTER ORGANIZATION & BE04000251
FREE PDF BE04000251
Code: BE04000251 Credits: 3 Semester 4 ICT

Computer Organization & Architecture

Get the full GTU study material, English & Gujarati textbook PDFs, syllabus curriculum, and solved previous year question papers.

Computer Organization & Architecture Syllabus — Unit-wise Content

The official GTU curriculum for Computer Organization & Architecture (subject code BE04000251) as prescribed for ICT · Semester 4 divides the course into 11 units, covering 57 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.

Download the official syllabus PDF (BE04000251)

Unit 1 Structure of Computers

2 lecture hours

  • Computer types
  • Functional units
  • Basic operational concepts
  • Von Neumann Architecture
  • Bus Structures
  • Multiprocessors and Multicomputer
  • Data representation
  • Fixed and Floating point
  • Error detection and correction codes

Unit 2 Register Transfer and Micro-operations

6 lecture hours

  • Register Transfer language
  • Register Transfer
  • Bus and Memory Transfers (Tree-State Bus Buffers
  • Memory Transfer)
  • Arithmetic Micro Operations
  • Logic Micro- Operations
  • Shift Micro-Operations
  • Arithmetic logical shift unit

Unit 3 Basic Computer Organization and Design Instruction codes, Computer

4 lecture hours

  • computer instructions
  • Timing and Control
  • Instruction cycle
  • Memory-Reference Instructions
  • Input-output and interrupt
  • Complete computer description
  • Design of Basic computer
  • Design of Accumulator Unit

Unit 4 Assembly Language Programming Introduction, Machine Language,

  • Assembly Language Programming: Arithmetic and logic operations
  • looping constructs

Unit 5 Micro programmed Control Organization

  • Control Memory
  • Address sequencing
  • Micro program example
  • Design of Control Unit 2 5

Unit 6 Central Processing Unit Introduction, General Register Organization,

  • Stack Organization
  • Instruction format
  • Addressing Modes
  • Data transfer and manipulation
  • Program control
  • Reduced Instruction Set Computer (RISC) & Complex Instruction Set Computer (CISC) 6 15

Unit 7 Pipeline And Vector Processing Flynn's taxonomy, Parallel Processing,

5 lecture hours

  • Arithmetic Pipeline
  • RISC Pipeline
  • Vector Processing
  • Array Processors 3

Unit 8 Input-Output Organization Input-Output Interface, Asynchronous Data

4 lecture hours

  • Modes Of Transfer
  • Priority Interrupt, DMA, Input-Output Processor (IOP)
  • CPUIOP Communication
  • Serial communication

Unit 9 Memory Organization Memory Hierarchy, Main Memory, Auxiliary

  • Associative Memory
  • Cache Memory
  • Virtual Memory. 4 10

Unit 10 Computer Arithmetic Introduction, Addition and subtraction,

4 lecture hours

  • Multiplication Algorithms (Booth Multiplication Algorithm)
  • Division Algorithms
  • Floating Point Arithmetic operations
  • Decimal Arithmetic Unit

Unit 11 Multiprocessors Characteristics of Multiprocessors, Interconnection

4 lecture hours

  • Inter-processor Arbitration
  • Inter-processor Communication and Synchronization
  • Cache Coherence
  • Shared Memory Multiprocessors
  • Program Name: Bachelor of Engineering Level: UG Subject Code: BE04000251 Subject Name: Computer Organization & Architecture

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