Compiler for HPC

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KHUDKIBOOK
COMPILER FOR HPC 3730210
FREE PDF 3730210
Code: 3730210 Credits: 3 Semester 3 CEE

Compiler for HPC

Get the full GTU study material, English & Gujarati textbook PDFs, syllabus curriculum, and solved previous year question papers.

Compiler for HPC Syllabus — Unit-wise Content

The official GTU curriculum for Compiler for HPC (subject code 3730210) as prescribed for CEE · Semester 3 divides the course into 6 units, covering 48 listed topics. The unit-wise breakdown below is read from the GTU syllabus document for this subject code, so you can check what the course actually covers before deciding which papers to attempt.

Download the official syllabus PDF (3730210)

Unit 1 High Performance Systems, Structure of a Compiler, Programming Language

6 lecture hours

  • Languages for High Performance

Unit 2 Data Dependence

10 lecture hours

  • Data Dependence in Loops
  • Data Dependence in Conditionals
  • Data Dependence in Parallel Loops
  • Program Dependence Graph
  • Scalar Analysis with Factored Use-Def Chains: Constructing Factored Use- Def Chains
  • FUD Chains for Arrays
  • Induction Variables Using FUD Chains
  • Constant Propagation with FUD Chains
  • Data Dependence for Scalars
  • Data Dependence Analysis for Arrays
  • Array Region Analysis
  • Pointer Analysis
  • Procedure Calls
  • Inter-procedural Analysis

Unit 3 Loop Restructuring

10 lecture hours

  • Simple Transformations
  • Loop Fusion
  • Loop Fission
  • Loop Reversal
  • Loop Interchanging
  • Loop Skewing
  • Linear Loop Transformations
  • Loop Tiling
  • Other Loop Transformations, and Inter-procedural Transformations
  • Optimizing for Locality: Single Reference to Each Array
  • Multiple References
  • General Tiling
  • Fission and Fusion for Locality

Unit 4 Concurrency Analysis

10 lecture hours

  • Concurrency from Sequential Loops
  • Concurrency from Parallel Loops
  • Nested Loops
  • Round off Error
  • Exceptions and Debuggers
  • Vector Analysis: Vector Code
  • Vector Code from Sequential Loops
  • Vector Code from For all Loops
  • Multi-vector Computers

Unit 5 Message-Passing Machines

10 lecture hours

  • SIMD Machines
  • MIMD Machines
  • Data Layout
  • Parallel Code for Array Assignment
  • Remote Data Access
  • Automatic Data Layout
  • Multiple Array Assignments
  • Scalable Shared-Memory Machines: Global Cache Coherence
  • Local Cache Subject Code: 3730210 Coherence
  • Latency Tolerant Machines

Unit 6 Recent trends in compiler design for high performance computing and message

2 lecture hours

  • passing machines and scalable shared memory machine

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